This project demonstrates how easy it is to communicate between two MRF24J40 modules using LPC1343 LPCXpresso and Embedded Artists LPCXpresso Base board.

Connect the MRF24J40 module to the LPCXpresso Base Board according to the PIN configuration below.

To initialize the RF module we did as suggested in the datasheet for MRF24J40 and also before data packets can be transmitted or received the TXNIF and RXIF interrupts must be enabled.
// Place the device in hardware reset
GPIOSetValue(PORT0, 0, 1);
delay32Ms(0, 300);
// Remove the device from hardware reset
GPIOSetValue(PORT0, 0, 1);
delay32Ms(0, 300);
// Pin setup for CS, WAKE and INT
pinSetup();
// Reset the RF module
setShortRAMAddr(WRITE_RFCTL, 0x01);
// Remove the RF module from reset
setShortRAMAddr(WRITE_RFCTL,0x00);
// Flush the RX fifo
setShortRAMAddr(WRITE_RXFLUSH,0x01);
// Program the short MAC Address, 0xffff
setShortRAMAddr(WRITE_SADRL,0xFF);
setShortRAMAddr(WRITE_SADRH,0xFF);
setShortRAMAddr(WRITE_PANIDL,0xFF);
setShortRAMAddr(WRITE_PANIDH,0xFF);
// Program Long MAC Address
for (i = 0; i < 8; i++) {
setShortRAMAddr(WRITE_EADR0 + i * 2, myLongAddress[i]);
}
// Enable the RF-PLL
setLongRAMAddr(RFCON2, 0x80);
// Set TX for max output power
setLongRAMAddr(RFCON3,0x00);
// Enabled TX filter control
setLongRAMAddr(RFCON6,0x80);
setLongRAMAddr(RFCON8,0b00010000);
// Program CCA mode using RSSI
setShortRAMAddr(WRITE_BBREG2,0x78);
// Enable the packet RSSI
setShortRAMAddr(WRITE_BBREG6,0x40);
// Program CCA, RSSI threshold values
setShortRAMAddr(RSSITHCCA,0x00);
//Enable only TXNIF and RXIF interrupts
setShortRAMAddr(WRITE_INTCON, 0xF6);
// Set channel
setLongRAMAddr(RFCON0,CHANNEL_11);
//Reset the RF module with new settings
setShortRAMAddr(WRITE_RFCTL,0x04);
setShortRAMAddr(WRITE_RFCTL,0x00);
The MRF24J40 supports IEEE 802.15.4 standard so that's what's used in this example application for the data packet format. The table below shows the structure of a packet for transmits.
| Address | Memory | Length | Description |
|---|---|---|---|
| 0x00 | Header length | 1 byte | Length of the security Header |
| 0x01 | Packet length | 1 byte | Length of the packet, not including the length or FCS |
| 0x02 | Frame Control | 2 bytes | Frame control describes how this packet should behave |
| 0x04 | Sequence Number | 1 byte | Sequence number of the packet |
| 0x05 | Data | Length of data | Destination and source addressing information and application data if any |
| 0x06+Length of data | FCS | 2 bytes | Packet CRC value, added by hardware |
Table 1 - Transmit Packet format
Example code on how to setup a data packet.
Note: In this example application no security is implemented so the security header length is set to zero. In the frame control it is specified that both the short address for destination and the short address of the source is added.
setLongRAMAddr(0x000, 0x00); //Security header length
setLongRAMAddr(0x001, (size - 1)); //Length
setLongRAMAddr(0x002, 0x01); //Frame control, Data command
setLongRAMAddr(0x003, 0x88); //Frame control, short destination
//address + short source address
setLongRAMAddr(0x004, sequenceID); //Sequence id
setLongRAMAddr(0x005, 0xFF); //Destination address, PANID_LSB
setLongRAMAddr(0x006, 0xFF); //PANID_MSB
setLongRAMAddr(0x007, 0xAA); //Destination address LSB
setLongRAMAddr(0x008, 0xAA); //Destination address MSB
setLongRAMAddr(0x009, 0xFF); //Source address, PANID_LSB
setLongRAMAddr(0x00A, 0xFF); //PANID_MSB
setLongRAMAddr(0x00B, 0xBB); //Source address LSB
setLongRAMAddr(0x00C, 0xBB); //Source address MSB
index = 0;
for (i = 0x00D; i <= size; i++) {
setLongRAMAddr(i, buf[index]); //Data
++index;
}
setShortRAMAddr(WRITE_TXNCON, 0x01); //Transmit packet without
//ACK requested
And the receive packet is structured as the table below.
| Address | Memory | Length | Description |
|---|---|---|---|
| 0x300 | Packet length | 1 byte | Length of the packet, not including the length or FCS |
| 0x301 | Frame Control | 2 bytes | Frame control describes how this packet should behave |
| 0x303 | Sequence Number | 1 byte | Sequence number of the packet |
| 0x304 | Data | Length of data | Destination and source addressing information and application data if any |
| 0x305+Length of data | FCS | 2 bytes | The CRC value of the packet. The RX buffer is cleared when the length byte of the packet and the last byte of the FCS are read. Once both of these values are read from the RX buffer, the buffer will enable itself to receive another packet. So it could be a good practice to read FCS last. |
| 0x307+Length of data | LQI | 1 byte | Link quality index of the packet |
| 0x308+Length of data | RSSI | 1 byte | Received signal strength indicator for the received packet |
Table 2 - Receive Packet format
In main() the GPIO interrupt handler must be installed and timers initiated to use delays. It is also needed to initialize the SSP port routine and setup the UART to 115200 baud rate. After that the MRF24J40 module is initialized, print the menu to the terminal and handle the menu options.
This small example application demonstrates how to send and receive packets with the MRF24J40 module
int main(void) {
init_timer32(0, 10);
GPIOInit();
SSPInit();
UARTInit(115200);
initMRF24J40();
while (1) {
printMenu();
handleCommand();
delay32Ms(0, 100);
}
return 1;
}

Begin by importing the driver and sample application bundle (zip file) for the LPC1343 LPCXpresso Board found at the Embedded Artists support site.
The second step is to import the MRF24J40 module project. Do the same as when importing the drivers, but choose MRF24J40_example.zip in step 2. To build or debug the example just click build/debug in the QuickStart tab
More information on how to work with the LPCXpresso Base Board as well as the LPCXpresso IDE can be found in the User's Manual for the LPCXpresso Base Board. This User's Manual can be found at the Embedded Artists support site.